A Cross-Layer Runtime Framework for Checkpoint-based Soft-Error and Aging Management in SoCs

Transient faults due to single and multiple bit-flips and permanent aging effects due to Bias Temperature Instability (BTI) and Hot Carrier Injection (HCI) gradually reduce chip reliability over time. Unfortunately, the increasingly stringent on-chip dark-silicon power constraints prohibit costly fault resilience solutions. Clearly, a viable approach is needed that can address both transientand aginginduced faults in emerging multicore chips. In this paper, we propose a novel runtime framework (CHARM) to manage the useful chip lifetime, while also addressing transient faults and meeting darksilicon and application performance constraints. Experimental results on a 60-core chip multiprocessor show that CHARM achieves an improvement of up to 2.5× in lifetime, up to 5× in resiliency to softerrors, and up to 6× in number of applications executed over the chip lifetime compared to a state-of-the-art solution.